1. Field of the Invention
This invention relates to a method of fabrication of integrated circuit gates.
The method in accordance with the invention is employed in the case of integrated circuits which have an array of closely spaced gates such as charge-coupled devices, for example.
2. Description of the Prior Art
It is known to construct closely spaced gates by employing high-performance photolithographic machines. A spacing of the order of 2 .mu.m between gates can thus be obtained.
The problem which arises is that of construction of gates having a spacing of less than 2 .mu.m by making use of conventional means.
The present invention makes it possible to solve this problem and to obtain center-to-center gate spacings which can be reduced to as little as 0.2 .mu.m.